Lattice Semiconductor_GAL22LV10D-5LJ
Lattice Semiconductor_GAL22LV10D-5LJ
Lattice Semiconductor

GAL22LV10D-5LJ  

FPGAs (Field Programmable Gate Array)
GAL22LV10D-5LJ
2-GAL22LV10D-5LJ
SPLD GAL Family 10 Macro Cells 200MHz 3.3V 28-Pin PLCC
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GAL22LV10D-5LJ Description

SPLD GAL Family 10 Macro Cells 200MHz 3.3V 28-Pin PLCC

Tech Specifications

Mounting Style
SMD/SMT
Operating Temperature
0 C to + 75 C
Supply Current
130 mA
Delay Time
5 ns
Supply Voltage - Min
3 V
Minimum Operating Temperature
0 C
Number of Macrocells
10
Package / Case
PLCC-28
Operating Supply Voltage
3 V to 3.6 V
Packaging
Tube
Maximum Operating Frequency
200 MHz
Maximum Operating Temperature
+ 75 C
Logic Family
GAL
Supply Voltage - Max
3.6 V
Factory Pack Quantity
370

GAL22LV10D-5LJ Documents

Download datasheets GAL22LV10D-5LJ

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