Lattice Semiconductor_ISPLSI 2032VE-135LB49
Lattice Semiconductor_ISPLSI 2032VE-135LB49
Lattice Semiconductor

ISPLSI 2032VE-135LB49  

FPGAs (Field Programmable Gate Array)
ISPLSI 2032VE-135LB49
2-ISPLSI 2032VE-135LB49
CPLD ispLSI 2000VE Family 1K Gates 32 Macro Cells 135MHz 3.3V 49-Pin CABGA
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ISPLSI 2032VE-135LB49 Description

CPLD ispLSI 2000VE Family 1K Gates 32 Macro Cells 135MHz 3.3V 49-Pin CABGA

Tech Specifications

Mounting Style
SMD/SMT
Supply Current
65 mA
Delay Time
3 ns
Memory Type
EEPROM
Supply Voltage - Min
3 V
Minimum Operating Temperature
0 C
Number of Macrocells
4
Package / Case
TQFP-48
Operating Supply Voltage
3.3 V
Packaging
Tube
Maximum Operating Frequency
135 MHz
Number of Programmable I/Os
28
Maximum Operating Temperature
+ 70 C
Supply Voltage - Max
3.6 V
Factory Pack Quantity
2080

ISPLSI 2032VE-135LB49 Documents

Download datasheets ISPLSI 2032VE-135LB49

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