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Lattice Semiconductor_ISPLSI 5512VE-125LF388
Lattice Semiconductor_ISPLSI 5512VE-125LF388
Lattice Semiconductor

ISPLSI 5512VE-125LF388  

FPGAs (Field Programmable Gate Array)
Lattice Semiconductor
ISPLSI 5512VE-125LF388
2-ISPLSI 5512VE-125LF388
CPLD ispLSI 5000VE Family 24K Gates 512 Macro Cells 125MHz 3.3V 388-Pin FBGA
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Description Tech Specifications Documents Shopping Guide

Tech Specifications

Mounting Style
SMD/SMT
Delay Time
6.5 ns
Memory Type
EEPROM
Supply Voltage - Min
3 V
Minimum Operating Temperature
0 C
Number of Macrocells
512
Package / Case
BGA-388
Operating Supply Voltage
3.3 V
Packaging
Tray
Number of Product Terms per Macro
35
Maximum Operating Frequency
125 MHz
Number of Programmable I/Os
70
Maximum Operating Temperature
+ 70 C
Supply Voltage - Max
3.6 V
Factory Pack Quantity
300

ISPLSI 5512VE-125LF388 Documents

Download datasheets ISPLSI 5512VE-125LF388

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