Welcome
de
Lattice Semiconductor
M4LV-128/64-10VI
FPGAs (Field Programmable Gate Array)
M4LV-128/64-10VI
2-M4LV-128/64-10VI
CPLD MACH 4 Family 5K Gates 128 Macro Cells 71.4MHz/95.2MHz 3.3V 100-Pin TQFP Tray
In Stock : Please Submit RFQ TO US
Not available
QUICK RFQ
ADD TO RFQ LIST
M4LV-128/64-10VI Description
CPLD MACH 4 Family 5K Gates 128 Macro Cells 71.4MHz/95.2MHz 3.3V 100-Pin TQFP Tray
Tech Specifications
Mounting Style
SMD/SMT
Delay Time
10 ns
Memory Type
EEPROM
Supply Voltage - Min
3 V
Minimum Operating Temperature
- 40℃
Number of Macrocells
128
Package / Case
TQFP-100
Operating Supply Voltage
4.5 V to 5.5 V
Packaging
Tube
Number of Product Terms per Macro
20
Maximum Operating Frequency
111.1 MHz
Number of Programmable I/Os
64
Maximum Operating Temperature
+ 85℃
Supply Voltage - Max
3.6 V
Factory Pack Quantity
90
M4LV-128/64-10VI Documents
Download datasheets M4LV-128/64-10VI
Related Parts
M2GL150TS-1FCS536
Microsemi
XC2VP4-7FGG456I
AMD
M2GL150T-1FCS536I
Microsemi
XC3164A-09PC84C
AMD
MPF100T-FCVG484E
Microsemi
POWR1014A-B-EVN
Lattice Semiconductor
M2GL150T-1FCVG484
Microsemi
XC3064-100CB100M
AMD
M5-320/160-7YI
Lattice Semiconductor
TSMACSCU2
Lattice Semiconductor
XC3020-PQ100
AMD
M2GL005-TQ144
Microsemi
XC2S50-5Q208C
AMD
LFXP15E-3FN388C
Lattice Semiconductor
AGL250V5-FGG144I
Microsemi
XC2C256TQ144
AMD
Shopping Guide
Payment Methods
Payment_desc
Shipping Rate
Shipping_rate_desc
Delivery Methods
Delivery_Methods_desc
Home_foot.INFORMATION
Home_foot.POLICIES
Home_foot.TOOLS
Home_foot.payment
Home_foot.Transportation
Home_foot.Trademark
Home_foot.Copyright