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Lattice Semiconductor_M4LV-32/32-15JC
Lattice Semiconductor_M4LV-32/32-15JC
Lattice Semiconductor

M4LV-32/32-15JC  

FPGAs (Field Programmable Gate Array)
Lattice Semiconductor
M4LV-32/32-15JC
2-M4LV-32/32-15JC
CPLD MACH 4 Family 1.25K Gates 32 Macro Cells 41.7MHz/55.6MHz 3.3V 44-Pin PLCC Tube
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M4LV-32/32-15JC Description

CPLD MACH 4 Family 1.25K Gates 32 Macro Cells 41.7MHz/55.6MHz 3.3V 44-Pin PLCC Tube

Tech Specifications

Mounting Style
SMD/SMT
Delay Time
15 ns
Memory Type
EEPROM
Supply Voltage - Min
3 V
Minimum Operating Temperature
0 C
Number of Macrocells
32
Package / Case
PLCC-44
Operating Supply Voltage
4.75 V to 5.25 V
Packaging
Tube
Number of Product Terms per Macro
20
Maximum Operating Frequency
111.1 MHz
Number of Programmable I/Os
32
Maximum Operating Temperature
+ 70 C
Supply Voltage - Max
3.6 V
Factory Pack Quantity
26

M4LV-32/32-15JC Documents

Download datasheets M4LV-32/32-15JC

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