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Lattice Semiconductor_M5-128/68-12YI
Lattice Semiconductor_M5-128/68-12YI
Lattice Semiconductor

M5-128/68-12YI  

FPGAs (Field Programmable Gate Array)
Lattice Semiconductor
M5-128/68-12YI
2-M5-128/68-12YI
CPLD MACH 5 Family 5K Gates 128 Macro Cells 52.6MHz/83.3MHz 5V 100-Pin PQFP Tray
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Description Tech Specifications Documents Shopping Guide

M5-128/68-12YI Description

CPLD MACH 5 Family 5K Gates 128 Macro Cells 52.6MHz/83.3MHz 5V 100-Pin PQFP Tray

Tech Specifications

Mounting Style
SMD/SMT
Delay Time
12 ns
Memory Type
EEPROM
Supply Voltage - Min
4.5 V
Minimum Operating Temperature
- 40℃
Number of Macrocells
128
Package / Case
PQFP-100
Operating Supply Voltage
4.5 V to 5.5 V
Packaging
Tube
Number of Product Terms per Macro
32
Maximum Operating Frequency
83.3 MHz, 100 MHz
Number of Programmable I/Os
68
Maximum Operating Temperature
+ 85℃
Supply Voltage - Max
5.5 V
Factory Pack Quantity
66

M5-128/68-12YI Documents

Download datasheets M5-128/68-12YI

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