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Lattice Semiconductor_M5-128/68-7YC
Lattice Semiconductor_M5-128/68-7YC
Lattice Semiconductor

M5-128/68-7YC  

FPGAs (Field Programmable Gate Array)
Lattice Semiconductor
M5-128/68-7YC
2-M5-128/68-7YC
CPLD MACH 5 Family 5K Gates 128 Macro Cells 83.3MHz/125MHz 5V 100-Pin PQFP Tray
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Description Tech Specifications Documents Shopping Guide

M5-128/68-7YC Description

CPLD MACH 5 Family 5K Gates 128 Macro Cells 83.3MHz/125MHz 5V 100-Pin PQFP Tray

Tech Specifications

Mounting Style
SMD/SMT
Delay Time
7.5 ns
Memory Type
EEPROM
Supply Voltage - Min
4.75 V
Minimum Operating Temperature
0 C
Number of Macrocells
128
Package / Case
PQFP-100
Operating Supply Voltage
4.75 V to 5.25 V
Packaging
Tube
Number of Product Terms per Macro
32
Maximum Operating Frequency
125 MHz, 167 MHz
Number of Programmable I/Os
68
Maximum Operating Temperature
+ 70 C
Supply Voltage - Max
5.25 V
Factory Pack Quantity
66

M5-128/68-7YC Documents

Download datasheets M5-128/68-7YC

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