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Lattice Semiconductor
M5LV-128/104-10VI
FPGAs (Field Programmable Gate Array)
M5LV-128/104-10VI
2-M5LV-128/104-10VI
CPLD MACH 5 Family 5K Gates 128 Macro Cells 66.7MHz/100MHz 3.3V 144-Pin TQFP Tray
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M5LV-128/104-10VI Description
Tech Specifications
Operating Temperature
-40°C ~ 85°C (TA)
Voltage Supply - Internal
3V ~ 3.6V
ECCN
EAR99
Number of I/O
104
Programmable Type
In System Programmable
Mounting Type
Surface Mount
Product Status
Obsolete
Supplier Device Package
144-TQFP (20x20)
Number of Macrocells
128
Series
MACH® 5
Package / Case
144-LQFP
REACH Status
REACH Unaffected
Mfr
Lattice Semiconductor Corporation
Delay Time tpd(1) Max
10 ns
HTSUS
8542.39.0001
Package
Tray
RoHS Status
RoHS non-compliant
Base Product Number
M5LV-128
Moisture Sensitivity Level (MSL)
3 (168 Hours)
M5LV-128/104-10VI Documents
Download datasheets M5LV-128/104-10VI
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