Intel_EPM5032JC-20
Intel_EPM5032JC-20
Intel

EPM5032JC-20  

FPGAs (Field Programmable Gate Array)
Intel
EPM5032JC-20
2-EPM5032JC-20
CPLD 600 Gates 32 Macro Cells 71.4MHz 5V 28-Pin PLCC
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EPM5032JC-20 Description

CPLD 600 Gates 32 Macro Cells 71.4MHz 5V 28-Pin PLCC

Tech Specifications

Maximum Latches
64
Macrocells
32
Pins
28
Maximum Flip-Flops
42

EPM5032JC-20 Documents

Download datasheets EPM5032JC-20

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