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Lattice Semiconductor
M4LV-256/128-7AC
FPGAs (Field Programmable Gate Array)
M4LV-256/128-7AC
2-M4LV-256/128-7AC
CPLD MACH 4 Family 10K Gates 256 Macro Cells 90.9MHz/111.1MHz 3.3V 256-Pin BGA Tray
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M4LV-256/128-7AC Description
CPLD MACH 4 Family 10K Gates 256 Macro Cells 90.9MHz/111.1MHz 3.3V 256-Pin BGA Tray
Tech Specifications
Mounting Style
SMD/SMT
Delay Time
7.5 ns
Memory Type
EEPROM
Supply Voltage - Min
3 V
Minimum Operating Temperature
0 C
Number of Macrocells
256
Package / Case
BGA-208
Operating Supply Voltage
4.75 V to 5.25 V
Packaging
Tube
Number of Product Terms per Macro
20
Maximum Operating Frequency
111.1 MHz
Number of Programmable I/Os
128
Maximum Operating Temperature
+ 70 C
Supply Voltage - Max
3.6 V
Factory Pack Quantity
40
M4LV-256/128-7AC Documents
Download datasheets M4LV-256/128-7AC
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